Processor-based computer systems include memory for data storage. Different types of memory exist, each possessing certain unique features. For example, static random access memory (SRAM) is a type of memory that can be employed in processor-based computer systems. SRAM can store data without the need to periodically refresh the memory, unlike dynamic read access memory (DRAM) for example. An SRAM contains a plurality of SRAM bitcells (also referred to as “bitcells”) organized in rows and columns in an SRAM data array. For any given row in an SRAM data array, each column of the SRAM data array will contain an SRAM bitcell in which a single data item or bit is stored. Access to a desired SRAM bitcell row is controlled by a corresponding wordline for read and write operations. To read data from an SRAM bitcell, a wordline is asserted to select a desired row of SRAM bitcells corresponding to a memory address of a memory access request. For a read operation (also referred to as a “memory read access”), data read from the selected SRAM bitcell is placed on a local bitline to be provided to an SRAM data output. For a write operation, data to be written to the SRAM bitcell is placed on the local bitline for the SRAM bitcell. Complementary (or inverse) local bitlines may also be employed to improve noise margins in the SRAM bitcell. Further, an SRAM data array may have multiple data sub-arrays or banks that each contain their own access circuitry and dedicated local wordlines and bitlines allowing for accesses in multiple data sub-arrays at the same time.
As processor-based computer systems continue to develop, there is a need to increase system robustness by preventing the corruption of data located in a SRAM bitcell when bit-masking is performed on the SRAM bitcell.